Enhanced active-feedback frequency compensation with on-chip-capacitor reduction feature for amplifiers with large capacitive load
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AbstractA large capacitive load amplifier with enhanced active-feedback frequency compensation is proposed in this paper. The enhancement is achieved through using a wide-bandwidth scalar circuit to increase the transconductance of the output stage so that the overall bandwidth of the amplifier can be extended considerably. Implemented in a standard CMOS 130-nm technology, with a supply of 0.7 V and consuming 27 μA of current, the amplifier drives a load capacitor of 15 nF. No on-chip resistor is needed; only a 0.91-pF compensation capacitor is used to maintain stability. The achieved gain-bandwidth product and phase margin are 1.28 MHz and 66.9°, respectively. Moreover, the slew rate is 0.263 V/μs. The active chip area is 0.0056 mm2.
All Author(s) ListLau MW, Mak KH, Leung KN, Guo JP, Goh WL
Journal nameInternational Journal of Circuit Theory and Applications
Year2017
Month12
Volume Number45
Issue Number12
PublisherWILEY
Pages2119 - 2133
ISSN0098-9886
eISSN1097-007X
LanguagesEnglish-United Kingdom
Keywordsactive-feedback frequency compensation,compensation capacitor,current buffer,Miller compensation,multistage amplifier
Web of Science Subject CategoriesEngineering, Electrical & Electronic;Engineering

Last updated on 2020-21-10 at 01:24