A combined approach to high-level synthesis for dynamically reconfigurable systems
Refereed conference paper presented and published in conference proceedings

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AbstractIn this paper, two complementary design models and related synthesis techniques are combined to capture behavioral and structural information in modelling and synthesizing a dynamically reconfigurable system. The proposed formulation is achieved by using finite domain constraints and related constraint-solving techniques offered by constraint logic programming. Our formulation represents operation-level temporal constraints and dynamic resource constraints in a unified model. Different synthesis tasks, such as temporal partitioning, scheduling and dynamic module allocation can be modelled in this framework, enabling the discovery of an optimal or near optimal solutions. Experiments have been carried out using a prototype of the high-level synthesis system implemented in CHIP, a constraint logic programming system. Current experimental results show that our approach can provide promising synthesis results in terms of the synthesis time and the number of reconfigurations.
All Author(s) ListZhang X.-J., Ng K.-W., Luk W.
Name of Conference10th International Conference on Field-Programmable Logic and Applications, FPL 2000
Start Date of Conference27/08/2000
End Date of Conference30/08/2000
Place of ConferenceVillach
Country/Region of ConferenceAustria
Detailed descriptioned. by HARTENSTEIN Reiner W. and GRUNBACHER Herbert.
Year2000
Month1
Day1
Volume Number1896
PublisherSpringer Verlag
Place of PublicationGermany
Pages361 - 370
ISBN3540678999
ISSN1611-3349
LanguagesEnglish-United Kingdom

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