A hybrid analog-digital routing network for NoC dynamic routing
Refereed conference paper presented and published in conference proceedings

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AbstractDynamic routing can substantially enhance the quality of service for multiprocessor communication, and can provide intelligent adaptation of faulty links during run time. Implementing dynamic routing on a network-on-chip (NoC) platform requires a design that provides highly efficient optimal path computation coupled with reduced area and power consumption. In this paper, we present a hybrid analog-digital routing network design that enables efficient dynamic routing on an NoC architecture. The digital part provides accurate real-time traffic estimation using a temporal cost evaluation and adaptation scheme. The analog network, which is distributed within the digital communication network, provides an efficient implementation for the optimal routing algorithm with extremely low power consumption. Our results demonstrate the effectiveness of the hybrid analog-digital design, with a significant improvement in latency over the static routing for random hot spot traffics. © 2007 IEEE.
All Author(s) ListMak T.S.T., Sedcole P., Cheung P.Y.K., Luk W., Lam K.P.
Name of ConferenceNOCS 2007: First International Symposium on Networks-on-Chip
Start Date of Conference07/05/2007
End Date of Conference09/05/2007
Place of ConferencePrinceton, NJ
Country/Region of ConferenceUnited States of America
Pages173 - 182
LanguagesEnglish-United Kingdom

Last updated on 2020-01-08 at 02:23