A 25-kHz 3rd-order continuous-time Delta-Sigma modulator using tri-level quantizer
Refereed conference paper presented and published in conference proceedings


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AbstractThis paper presents a 3rd order continuous-time Delta-Sigma modulator with a tri-level quantizer, which provides 3-dB reduction of quantization noise without dynamic element matching (DEM). The tri-level DAC linearity is analyzed and it shows that a highly linear tri-level DAC can be realized in fully-differential active-RC Delta-Sigma modulator. The performance of the tri-level continuous-time Delta-Sigma modulator has been verified through simulations using a standard 0.18-μm CMOS process. It achieves 81-dB SNDR at 3.2-MS/s sampling rate and consumes 1.14-μW power with ideal amplifier.
All Author(s) ListLi D., Pun K.-P.
Name of Conference5th International Symposium on Next-Generation Electronics, ISNE 2016
Start Date of Conference04/05/2016
End Date of Conference06/05/2016
Place of ConferenceHsinchu
Country/Region of ConferenceTaiwan
Detailed descriptionorganized by National Tsing Hua University, Hsinchu, Taiwan,
Year2016
Month8
Day12
ISBN9781509024391
LanguagesEnglish-United Kingdom

Last updated on 2020-28-03 at 00:59