AgeSim: A simulation framework for evaluating the lifetime reliability of processor-based SoCs
Refereed conference paper presented and published in conference proceedings


Full Text

Times Cited

Other information
AbstractAggressive technology scaling has an ever-increasing adverse impact on the lifetime reliability of microprocessors. This paper proposes a novel simulation framework for evaluating the lifetime reliability of processor-based system-on-a-chips (SoCs), namely AgeSim, which facilitates designers to make design decisions that affect SoCs' mean time to failure. Unlike existing work, AgeSim can simulate failure mechanisms with arbitrary lifetime distributions and do not require to trace the system's reliability-related factors over its entire lifetime, and hence is more efficient and accurate. Two case studies are conducted to show the flexibility and effectiveness of the proposed methodology. © 2010 EDAA.
All Author(s) ListHuang L., Xu Q.
Name of ConferenceDesign, Automation and Test in Europe Conference and Exhibition, DATE 2010
Start Date of Conference08/03/2010
End Date of Conference12/03/2010
Place of ConferenceDresden
Country/Region of ConferenceGermany
Detailed descriptionorganized by IEEE/ACM,
Year2010
Month6
Day9
Pages51 - 56
ISBN9783981080162
ISSN1530-1591
LanguagesEnglish-United Kingdom

Last updated on 2020-09-08 at 03:18