On efficient silicon debug with flexible trace interconnection fabric
Refereed conference paper presented and published in conference proceedings

香港中文大學研究人員
替代計量分析
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其它資訊
摘要Trace-based debug solutions facilitate to eliminate bugs escaped from pre-silicon verification and have gained wide acceptance in the industry. Generally speaking, a number of 'key' signals in the circuit are tapped, but not all of them can be observed at the same time due to the limited trace bandwidth. Therefore, a trace interconnection fabric is utilized to output either a subset of signals with multiplexor (MUX) network or compressed signatures with XOR network to the trace memory/port in each debug run. However, both kinds of trace interconnection fabrics have limitations. On one hand, with MUX-based fabric, the visibility of the circuit is limited and it requires many debug runs to locate errors. On the other hand, with XOR-based fabric, typically clean 'golden vectors' (i.e, without unknown bits) are required so that signatures are not corrupted. In this paper, we propose a flexible trace interconnection fabric design that is able to overcome the above limitations, at the cost of little extra design-for-debug hardware. Experimental results on benchmark circuits demonstrate the effectiveness of the proposed technique. © 2012 IEEE.
著者Liu X., Xu Q.
會議名稱2012 International Test Conference, ITC 2012
會議開始日06.11.2012
會議完結日08.11.2012
會議地點Anaheim, CA
會議國家/地區美國
詳細描述organized by IEEE,
出版年份2012
月份12
日期1
國際標準書號9781467315951
國際標準期刊號1089-3539
語言英式英語

上次更新時間 2020-14-10 於 02:12