On effective TSV repair for 3D-stacked ICs
Refereed conference paper presented and published in conference proceedings

香港中文大學研究人員

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摘要3D-stacked ICs that employ through-silicon vias (TSVs) to connect multiple dies vertically have gained wide-spread interest in the semiconductor industry. In order to be commercially viable, the assembly yield for 3D-stacked ICs must be as high as possible, requiring TSVs to be reparable. Existing techniques typically assume TSV faults to be uniformly distributed and use neighboring TSVs to repair faulty ones, if any. In practice, however, clustered TSV faults are quite common due to the fact that the TSV bonding quality depends on surface roughness and cleaness of silicon dies, rendering prior TSV redundancy solutions less effective. To resolve this problem, we present a novel TSV repair framework, including a hardware architecture that enables faulty TSVs to be repaired by redundant TSVs that are farther apart, and the corresponding repair algorithm. By doing so, the manufacturing yield for 3D-stacked ICs can be dramatically improved, as demonstrated in our experimental results. © 2012 EDAA.
著者Jiang L., Xu Q., Eklow B.
會議名稱15th Design, Automation and Test in Europe Conference and Exhibition, DATE 2012
會議開始日12.03.2012
會議完結日16.03.2012
會議地點Dresden
會議國家/地區德國
詳細描述organized by IEEE,ACM,
出版年份2012
月份5
日期24
頁次793 - 798
國際標準書號9783981080186
國際標準期刊號1530-1591
語言英式英語

上次更新時間 2020-08-09 於 01:07