A 0.4 V low power baseband processor for UHF passive RFID tags
Refereed conference paper presented and published in conference proceedings

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摘要In this paper, a RFID baseband processor designed according to the EPC C1G2 protocol is presented. By adjusting the processor's activities according to the RF modulated envelop - the received signal strength, and by distributing data processing in different period, a low voltage, energy-aware design is achieved. Special care was taken in backend design to extend the clock frequency range and the supply range, so the robustness of the processor is ensured. The processor was fa bricated in standard 180nm CMOS technology. It consumes le ss than 180 nW at 0.4V supply. © 2010 IEEE.
著者Shi W., Choy C.-S., Chan C.F., Leung K.N., Pun K.P.
會議名稱8th IEEE International NEWCAS Conference, NEWCAS 2010
會議開始日20.06.2010
會議完結日23.06.2010
會議地點Montreal, QC
會議國家/地區加拿大
詳細描述organized by Circuits and Systems Society,
出版年份2010
月份11
日期22
頁次65 - 68
國際標準書號9781424468058
語言英式英語

上次更新時間 2021-12-01 於 23:56