On effective and efficient in-field TSV repair for stacked 3D ICs
Refereed conference paper presented and published in conference proceedings

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AbstractThree-dimensional (3D) integration based on through-silicon-vias (TSVs) is rapidly gaining traction for industry adoption. However, manufacturing processes for TSVs have been shown to introduce new failure mechanisms. In particular, thermo-mechanical stress and electromigration introduce reliability threats for TSVs, e.g., voids and interfacial cracks, which can lead to hard-to-predict timing errors on critical paths with TSVs, thereby resulting in accelerated chip failure in the field. Burn-in for screening latent defects during manufacturing is expensive and its effectiveness for new TSV defect types has yet to be thoroughly characterized. We describe a reconfigurable in-field repair solution that is able to effectively tolerate latent TSV defects through the judicious use of spares. The proposed solution includes a reconfigurable repair architecture that enables spare TSV sharing between TSV grids, and the corresponding in-field repair algorithms. The effectiveness and efficiency of our proposed solution is evaluated using 3D benchmark designs. Copyright © 2013 ACM.
All Author(s) ListJiang L., Ye F., Xu Q., Chakrabarty K., Eklow B.
Name of Conference50th Annual Design Automation Conference, DAC 2013
Start Date of Conference29/05/2013
End Date of Conference07/06/2013
Place of ConferenceAustin, TX
Country/Region of ConferenceUnited States of America
Detailed descriptionorganized by ACM/IEEE,
LanguagesEnglish-United Kingdom

Last updated on 2020-25-10 at 00:40