"Systolic Array Based VLSI Architecture For High Throughput 2-D Discrete Wavelet Transform"
Refereed conference paper presented and published in conference proceedings


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All Author(s) ListWANG, Hongda, CHOY Chiu Sing Oliver
Name of Conference2016 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC'16)
Start Date of Conference03/08/2016
Proceedings Title2016 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC'16)
Year2016
Month8
Day3
Pages4
LanguagesEnglish-United Kingdom
Keywordslifting scheme; discrete wavelet transform; systolic array

Last updated on 2018-22-01 at 13:25