An 8x8 adiabatic quasi-static CMOS multiplier
Refereed conference paper presented and published in conference proceedings

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AbstractThis paper presents a new type of adiabatic logic. The new adiabatic circuit is named Adiabatic Quasi-Static CMOS (AqsCMOS), because the output is quasi-static. The AqsCMOS is totally compatible with conventional CMOS. Designers carl easily reduce the power budget by replacing all or part of an existing CMOS circuit with AqsCMOS circuits to achieve for low power operation. We have designed and fabricated an 8x8 AqsCMOS multiplier demonstrate the operation of AqsCMOS. The simulation results have indicated that the new AqsCMOS 8x8 multiplier consume 90 % less power compare with a conventional 8x8 multiplier of similar architecture.
All Author(s) ListMak WS, Chan CF, Cheung KW, Choy CS
Name of ConferenceIEEE International Symposium on Circuits and Systems (ISCAS 2000)
Start Date of Conference28/05/2000
End Date of Conference31/05/2000
Place of ConferenceGENEVA
Country/Region of ConferenceSwitzerland
Pages553 - 556
LanguagesEnglish-United Kingdom
Web of Science Subject CategoriesComputer Science; Computer Science, Hardware & Architecture; Engineering; Engineering, Electrical & Electronic

Last updated on 2021-18-09 at 00:44