Ripple 2.0: High Quality Routability-Driven Placement via Global Router Integration
Refereed conference paper presented and published in conference proceedings


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摘要Due to a significant mismatch between the objectives of wirelength and routing congestion, the routability issue is becoming more and more important in VLSI design. In this paper, we present a high quality placer Ripple 2.0 to solve the routability-driven placement problem. We will study how to make use of the routing path information in cell spreading and relieve congestion with tangled logic in detail. Several techniques are proposed, including (1) lookahead routing analysis with pin density consideration, (2) routing path-based cell inflation and spreading and (3) robust optimization on congested cluster. With the official evaluation protocol, Ripple 2.0 outperforms the top contestants on the ICCAD 2012 Contest benchmark suite.
著者He X, Huang T, Chow WK, Kuang J, Lam KC, Cai WZ, Young EFY
會議名稱50th ACM/EDAC/IEEE Design Automation Conference (DAC)
會議開始日29.05.2013
會議完結日07.06.2013
會議地點Austin
會議國家/地區美國
詳細描述organized by ACM Design Automation Conference,
出版年份2013
月份1
日期1
出版社IEEE COMPUTER SOC
電子國際標準書號978-1-4503-2071-9
國際標準期刊號0738-100X
語言英式英語
Web of Science 學科類別Computer Science; Computer Science, Theory & Methods; Engineering; Engineering, Electrical & Electronic

上次更新時間 2020-21-10 於 23:10