Dynamic On-Chip Thermal Optimization for Three-Dimensional Networks-On-Chip
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AbstractThe complex thermal behaviour prohibits the advancement of three-dimensional (3D) very-large-scale integration system. Particularly, the high-density through-silicon via based integration could lead to ultra-high temperature hotspots and permanent silicon device damage. In this paper, we introduce an adaptive strategy to effectively diffuse heat throughout the 3D geometry. This strategy employs a dynamic programming network to select and optimize the direction of data manoeuvre in a network-on-chip (NoC). We also developed a tool, which is based on the accurate HotSpot thermal model and SystemC cycle accurate model, to simulate the thermal system and evaluate our approach. We found that the proposed approach can significantly diffuse the hotspots from a 3D geometry and overall temperature can be significantly reduced. Given the same thermal constraints, the throughput performance of an adaptive NoC can also be improved. This work enables a new avenue to explore the on-chip adaptability for the future large-scale 3D integration.
All Author(s) ListAl-Dujaily R, Mak T, Lam KP, Xia F, Yakovlev A, Poon CS
Journal nameComputer Journal
Volume Number56
Issue Number6
PublisherOxford University Press (OUP): Policy A - Oxford Open Option A
Pages756 - 770
LanguagesEnglish-United Kingdom
Keywords3D IC; chip multiprocessor; dynamic programming; networks-on-chip; performance analysis; thermal optimization
Web of Science Subject CategoriesComputer Science; Computer Science, Hardware & Architecture; COMPUTER SCIENCE, HARDWARE & ARCHITECTURE; Computer Science, Information Systems; COMPUTER SCIENCE, INFORMATION SYSTEMS; Computer Science, Software Engineering; COMPUTER SCIENCE, SOFTWARE ENGINEERING; Computer Science, Theory & Methods; COMPUTER SCIENCE, THEORY & METHODS

Last updated on 2020-14-08 at 02:55