A Fast-Response Pseudo-PWM Buck Converter With PLL-Based Hysteresis Control
Publication in refereed journal

香港中文大學研究人員

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摘要Hysteresis voltage-mode control is a simple and fast control scheme for switched-mode power converters. However, it is well-known that the switching frequency of a switched-mode power converter with hysteresis control depends on many factors such as loading current and delay of the controller which vary from time to time. It results in a wide noise spectrum and leads to difficulty in shielding electro-magnetic interference. In this work, a phase-lock loop (PLL) is utilized to control the hysteresis level of the comparator used in the controller, while not interfering with the intrinsic behavior of the hysteresis controller. Some design techniques are used to solve the integration problem and to improve the settling speed of the PLL. Moreover, different control modes are implemented. A buck converter with proposed control scheme is fabricated using a commercial 0.35-mu m CMOS technology. The chip area is 1900 mu m x 2200 mu m. The switching frequency is locked to 1 MHz, and the measured frequency deviation is within +/- 1%. The measured load transient response between 160 and 360 mA is 5 mu s only.
著者Zheng YQ, Chen H, Leung KN
期刊名稱IEEE Transactions on Very Large Scale Integration (VLSI) Systems
詳細描述vol. 20, no. 7
出版年份2012
月份7
日期1
卷號20
期次7
出版社Institute of Electrical and Electronics Engineers (IEEE)
頁次1167 - 1174
國際標準期刊號1063-8210
電子國際標準期刊號1557-9999
語言英式英語
關鍵詞Buck converter; hysteresis control; phase-locked loop (PLL)
Web of Science 學科類別Computer Science; Computer Science, Hardware & Architecture; COMPUTER SCIENCE, HARDWARE & ARCHITECTURE; Engineering; Engineering, Electrical & Electronic; ENGINEERING, ELECTRICAL & ELECTRONIC

上次更新時間 2020-27-11 於 23:08