Adaptive Routing in Network-on-Chips Using a Dynamic-Programming Network
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AbstractDynamic routing is desirable because of its substantial improvement in communication bandwidth and intelligent adaptation to faulty links and congested traffic. However, implementation of adaptive routing in a network-on-chip system is not trivial and is further complicated by the requirements of deadlock-free and real-time optimal decision making. In this paper, we present a deadlock-free routing architecture which employs a dynamic programming (DP) network to provide on-the-fly optimal path planning and network monitoring for packet switching. Also, a new routing strategy called k-step look ahead is introduced. This new strategy can substantially reduce the size of routing table and maintain a high quality of adaptation which leads to a scalable dynamic-routing solution with minimal hardware overhead. Our results, based on a cycle-accurate simulator, demonstrate the effectiveness of the DP network, which outperforms both the deterministic and adaptive-routing algorithms in average delay on various traffic scenarios by 22.3%. Moreover, the hardware overhead for DP network is insignificant, based on the results obtained from the hardware implementations.
All Author(s) ListMak T, Cheung PYK, Lam KP, Luk W
Journal nameIEEE Transactions on Industrial Electronics
Year2011
Month8
Day1
Volume Number58
Issue Number8
PublisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Pages3701 - 3716
ISSN0278-0046
LanguagesEnglish-United Kingdom
KeywordsAdaptive routing; Bellman equation; DP network; dynamic programming (DP); network-on-chip (NoC)
Web of Science Subject CategoriesAutomation & Control Systems; AUTOMATION & CONTROL SYSTEMS; Engineering; Engineering, Electrical & Electronic; ENGINEERING, ELECTRICAL & ELECTRONIC; Instruments & Instrumentation; INSTRUMENTS & INSTRUMENTATION

Last updated on 2020-06-08 at 01:50